The present disclosure relates generally to an electronic display for an electronic device and, more particularly, to an electronic display with bit error rate (BER) detection circuitry.
This section is intended to introduce the reader to various aspects of art that may be related to various aspects of the present techniques, which are described and/or claimed below. This discussion is believed to be helpful in providing the reader with background information to facilitate a better understanding of the various aspects of the present disclosure. Accordingly, it should be understood that these statements are to be read in this light, and not as admissions of prior art.
Electronic displays, such as liquid crystal displays (LCDs) and organic light emitting diode (OLED) displays, are commonly used in electronic devices such as televisions, computers, and phones. The electronic displays display images when image data is sent by a timing controller (TCON) to display drivers in the electronic display. Conventionally, this image data from the TCON is sent at a sufficiently low frequency such that bit errors are relatively uncommon.
Chip-on-glass (COG) data links may connect the TCON to each display driver. Many failure modes could occur in the COG data links that could make one the bit error rate (BER) of image data received by some display drivers worse than others. Some failures may be obvious during manufacturing and may be relatively easy to spot. These obvious failures may manifest as screen noise visible to a human operator, allowing manufacturers to discard or repair the electronic display. Latent failures, however, may not at first be serious enough to cause any visible display noise at the time of manufacturing. These latent failures could go unscreened, later manifesting as long-term failures after sale to a user.